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general description the max4322/max4323/max4326/max4327/max4329 family of operational amplifiers combines wide bandwidth and excellent dc accuracy with rail-to-rail operation at the inputs and outputs. these devices consume only 650? per amplifier and operate from either a single sup- ply (2.4v to 6.5v) or dual supplies (?.2v to ?.25v). these unity-gain-stable amplifiers are capable of driving 250 ? loads and have a 5mhz gain-bandwidth product. the max4323 and max4327 feature a low-power shutdown mode that reduces supply current to 25? and places the outputs in a high-impedance state. with their rail-to-rail input common-mode range and output swing, these amplifiers are ideal for low-voltage, single-supply operation. in addition, low offset voltage and high speed make them the ideal signal-condition- ing stages for precision, low-voltage data-acquisition systems. the max4323 is offered in a small 6-bump chip-scale package (ucsp). the max4322/max4323 are also available in space-saving sot23 packages. ________________________applications battery-powered data-acquisition instruments systems rssi systems signal conditioning pa biasing portable equipment low-power, low-voltage applications ____________________________features 6-bump ucsp package (max4323) 2.4v to 6.5v single-supply operation rail-to-rail input common-mode voltage range rail-to-rail output voltage swing 5mhz gain-bandwidth product 650a quiescent current per amplifier 700v offset voltage no phase reversal for overdriven inputs drive 250 ? loads 25a shutdown mode (max4323/max4327) unity-gain stable for capacitive loads up to 500pf max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps ________________________________________________________________ maxim integrated products 1 pin configurations 19-1380; rev 3; 10/02 ordering information rail-to-rail is a registered trademark of nippon motorola, ltd. ucsp is a trademark of maxim integrated products, inc. selector guide top view (bumps on bottom) ucsp max4323 1 2 3 v ee a b out v cc in+ in- shdn for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin/bump- package top mark max4322 euk-t -40 o c to +85 o c 5 sot23-5 acge max4322eua -40 o c to +85 o c 8 max max4322esa -40 o c to +85 o c 8 so ordering information continued at end of data sheet. pin configurations continued at end of data sheet. 10 max, 14 so 2 5 max4327 yes 8 max/so 2 5 max4326 yes shutdown 14 so 6 sot23/ucsp, 8 max/so 5 sot23, 8 max/so pin/bump- package 4 5 max4329 1 5 max4323 part 1 5 max4322 no. of amps bw (mhz)
max4322/max4323/max4326/max4327/max4329 single /d ual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics? a = +25? (v cc = 5.0v, v ee = 0v, v cm = 0v, v out = v cc /2, shdn = v cc, r l connected to v cc /2, unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. supply voltage (v cc - v ee ) ...................................................7.5v all other pins ...................................(v cc + 0.3v) to (v ee - 0.3v) output short-circuit duration.....................................continuous (short to either supply) continuous power dissipation (t a = +70 c) 5-pin sot23 (derate 7.1mw/ c above +70 c)............571mw 6-bump ucsp (derate 3.9mw/ c above +70 c).........308mw 6-pin sot23 (derate 7.1mw/ c above + 70 c) ..........571mw 8-pin so (derate 5.88mw/ c above +70 c)................471mw 8-pin max (derate 4.10mw/ c above +70 c) ...........330mw 10-pin max (derate 5.6mw/ c above +70 c) ...........444mw 14-pin so (derate 8.00mw/ c above +70 c)..............640mw operating temperature range max432_e__ ...................................................-40 c to +85 c maximum junction temperature .....................................+150 c storage temperature range .............................-65 c to +160 c bump reflow temperature ..............................................+235 c lead temperature (soldering, 10s) .................................+300 c parameter symbol conditions min typ max units max432_esa/ max4327esd 0.7 2.0 input offset voltage v os v cm = v ee or v cc all other packages 1.2 2.50 mv input bias current i b v cm = v ee or v cc 50 150 na input offset current i os v cm = v ee or v cc 1 12 na differential input resistance r in -1.5v < v diff < +1.5v 500 k ? common-mode input voltage range cmvr inferred from cmrr test v ee v cc v max432_esa/ max4327esd 62 94 common-mode rejection ratio cmrr v ee v cm v cc all other packages 60 91 db power-supply rejection ratio psrr v cc = 2.4v to 6.5v 66 100 db output resistance r out a v = +1v/v 0.1 ? v out = 0.25v to 4.75v, r l = 100k ? 106 large-signal voltage gain a v v out = 0.4v to 4.6v, r l = 250 ? 70 86 db v cc - v oh 12 r l = 100k ? v ol - v ee 20 v cc - v oh 200 300 max4322/ max4323 r l = 250 ? v ol - v ee 100 200 v cc - v oh 15 r l = 100k ? v ol - v ee 25 v cc - v oh 220 350 output voltage swing v o max4326/ max4327/ max4329 r l = 250 ? v ol - v ee 120 250 mv output short-circuit current i sc 50 ma v il low 0.8 shdn logic threshold v ih max4323/max4327 high 2.0 v shdn input current max4323/max4327 1 4 a
max4322/max4323/max4326/max4327/max4329 single /d ual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps _______________________________________________________________________________________ 3 dc electrical characteristics t a = -40 c to +85 c (v cc = 5v, v ee = 0v, v cm = 0v, v out = v cc /2, shdn = v cc, r l connected to v cc /2, unless otherwise noted.) (note 1) dc electrical characteristics t a = +25 c (continued) (v cc = 5v, v ee = 0v, v cm = 0v, v out = v cc /2, shdn = v cc, r l connected to v cc /2, unless otherwise noted.) parameter symbol conditions min typ max units max432_esa/ max4327esd 3.0 input offset voltage v os v cm = v ee or v cc all other packages 6.0 mv input offset voltage tempco tcv os 2 v/ c input bias current i b v cm = v ee or v cc 180 na input offset current i os v cm = v ee or v cc 20 na common-mode input voltage range cmvr inferred from cmrr test v ee v cc v max432_esa/ max4327esd 59 common-mode rejection ratio cmrr v ee v cm v cc all other packages 54 db power-supply rejection ratio psrr v cc = 2.4v to 6.5v 62 db large-signal voltage gain a v v out = 0.4v to 4.6v, r l = 250 ? 66 db v cc - v oh 350 max4322/ max4323 r l = 250 ? v ol - v ee 250 v cc - v oh 400 output voltage swing v o max4326/ max4327/ max4329 r l = 250 ? v ol - v ee 300 mv v il low 0.8 shdn logic threshold v ih max4323/max4327 high 2.0 v shdn input current max4323/max4327 5 a operating supply voltage range v cc 2.4 6.5 v supply current per amplifier i cc v cm = v out = v cc /2 1200 a shutdown supply current per amplifier i shdn v shdn 0.8v, max4323/max4327 70 a parameter symbol conditions min typ max units operating supply voltage range v cc inferred from psrr test 2.4 6.5 v v cc = 2.4v 650 supply current per amplifier i cc v cm = v out = v cc /2 v cc = 5v 725 1100 a v cc = 2.4v 25 shutdown supply current per amplifier i shdn v shdn 0.8v, max4323/max4327 v cc = 5v 40 60 a
max4322/max4323/max4326/max4327/max4329 single /d ual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 4 _______________________________________________________________________________________ ac electrical characteristics (v cc = 5v, v ee = 0v, v cm = v out = v cc /2, shdn = v cc, t a = +25 c, unless otherwise noted.) note 1: all devices are 100% tested at t a = +25 c. all temperature limits are guaranteed by design. parameter symbol conditions min typ max units gain-bandwidth product gbwp 5 mhz phase margin m 64 degrees gain margin g m 12 db total harmonic distortion thd f = 10khz, v out = 2v p-p , a v = +1v/v 0.003 % slew rate sr 2 v/s settling time to 0.01% t s a v = +1v/v, v out = 2v step 2.0 s turn-on time t on v cc = 0 to 3v step 1 s enable 1 shdn delay max4323/max4327 disable 0.2 s input capacitance c in 3pf input noise-voltage density e n f = 1khz 22 nv/ hz input noise-current density i n f = 1khz 0.4 pa/ hz amp-amp isolation 135 db capacitive-load stability c l a v = +1v/v 250 pf
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps _______________________________________________________________________________________ 5 60 -40 100 1k 10k 1m 10m 100k 100m gain and phase vs. frequency -20 frequency (hz) gain (db) 0 20 40 phase gain a v = +1000 no load phase (degrees) 180 144 72 0 -72 -144 -180 -108 -36 36 108 max4322/26/29-01 60 -40 100 1k 10k 1m 10m 100k 100m gain and phase vs. frequency (with c load ) -20 max4322/26/29-02 frequency (hz) gain (db) 0 20 40 phase gain a v = +1000 r l = c l = 500pf phase (degrees) 180 144 72 0 -72 -144 -180 -108 -36 36 108 0 -100 10 100 1k 100k 1m 10m 10k 100m power-supply rejection ratio vs. frequency -80 max4322/26/29-03 frequency (hz) psrr (db) -60 -40 -20 a v = +1 __________________________________________typical operating characteristics (v cc = 5v, v ee = 0v, v cm = v cc /2, shdn = v cc, t a = +25 c, unless otherwise noted.) 1k 10k 10m frequency (hz) 100k 1m 100 130 50 60 70 80 90 100 110 120 max4326/max4327/max4329 channel separation vs. frequency max4322/26/29-04 channel separation (db) 100 0.01 100 1k 100k 1m 10m 10k 100m output impedance vs. frequency 0.1 max4322/26/29-05 frequency (hz) output impedance ( ? ) 1 10 a v = +1 900 500 550 600 650 700 750 800 850 -40 -25 -10 5 20 35 50 65 80 95 supply current per amplifier vs. temperature max4322/26/29-07 temperature ( c) supply current ( a) v cc = 6.5v v cc = 2.7v -3.00 -2.25 -0.75 -1.50 0 1.50 0.75 2.25 3.00 -40 -25 -10 5 20 35 50 65 80 95 input offset voltage vs. temperature max4322/26/29-08 temperature ( c) voltage (mv) sot23-5/6 package so package -50 0123456 input bias current vs. common-mode voltage max4322/26/29-09 common-mode voltage (v) input bias current (na) -40 -30 -20 -10 0 10 20 30 40 50 v cc = 2.7v v cc = 6.5v 0 10 20 30 40 50 60 -40 -25 -10 5 20 35 50 65 80 95 max4323/max4327 shutdown supply current vs. temperature max4323-06 temperature ( c) shutdown supply current ( a) v cc = 6.5v v cc = 2.7v v shdn = 0v
_____________________________typical operating characteristics (continued) (v cc = 5v, v ee = 0v, v cm = v cc /2, shdn = v cc, t a = +25 c, unless otherwise noted.) max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 6 _______________________________________________________________________________________ 120 80 85 90 95 100 105 110 115 -40 -25 -10 5 20 35 50 65 80 95 common-mode rejection ratio vs. temperature max4322/26/29-11 temperature ( c) cmrr (db) v cm = 0 to 5.0v v cm = -0.2v to 5.2v 250 0 -40 -25 -10 5 20 35 50 65 80 95 minimum output voltage vs. temperature 50 200 max4322/26/29-12 temperature ( c) v out - v ee (mv) 150 100 r l to v cc v cc = 6.5v, r l = 500 ? v cc = 2.7v, r l = 100k ? v cc = 2.7v, r l = 500 ? v cc = 6.5v, r l = 100k ? 0 50 100 150 200 250 300 -40 -25 -10 5 20 35 50 65 80 95 maximum output voltage vs. temperature max4322/26/29-13 temperature ( c) v cc - v out (mv) r l to v ee v cc = 6.5v, r l = 500 ? v cc = 2.7v, r l = 100k ? (bottom) v cc = 2.7v, r l = 500 ? v cc = 6.5v, r l = 100k ? (top) 120 60 0 600 110 output voltage: from v cc (mv) gain (db) 300 90 80 70 100 200 500 100 400 max4322/26/29-14 large-signal gain vs. output voltage v cc = 2.7v r l to v ee r l = 500 ? r l = 100k ? r l = 10k ? r l = 2k ? 120 60 0 600 110 output voltage: from v cc (mv) gain (db) 300 90 80 70 100 200 500 100 400 max4322/26/29-15 large-signal gain vs. output voltage v cc = 6.5v r l to v ee r l = 500 ? r l = 100k ? r l = 10k ? r l = 2k ? 125 75 -40 -25 -10 5 20 35 50 65 80 95 large-signal gain vs. temperature 85 115 max4322/26/29-16 temperature ( c) gain (db) 105 95 80 90 120 110 100 v cc = 2.7v, r l to v ee v cc = 6.5v, r l to v cc v cc = 2.7v, r l to v cc r l = 500 ? v out(p-p) = v cc - 1v v cc = 6.5v, r l to v ee 120 60 0 600 110 gain (db) 300 90 80 70 100 200 500 100 400 max4322/26/29-17 large-signal gain vs. output voltage r l = 500 ? r l = 100k ? r l = 10k ? r l = 2k ? v cc = 2.7v r l to v cc output voltage: from v ee (mv) 120 60 0 600 110 gain (db) 300 90 80 70 100 200 500 100 400 max4322/26/29-18 large-signal gain vs. output voltage v cc = 6.5v r l to v cc r l = 500 ? r l = 100k ? r l = 10k ? r l = 2k ? output voltage: from v ee (mv) -60 -50 -40 -25 -10 5 20 35 50 65 80 95 input bias current vs. temperature max4322/26/29-10 temperature ( c) input bias current (na) -40 -30 -20 -10 0 10 20 30 40 50 v cc = 6.5v, v cm = v cc v cc = 2.7v, v cm = v ee v cc = 2.7v, v cm = v cc v cc = 6.5v, v cm = v ee
_____________________________typical operating characteristics (continued) (v cc = 5v, v ee = 0v, v cm = v cc /2, shdn = v cc, t a = +25 c, unless otherwise noted.) max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps _______________________________________________________________________________________ 7 1.2 1.3 1.5 1.4 1.6 1.7 1.8 1.9 -40 -25 -10 5 20 35 50 65 80 95 minimum operating voltage vs. temperature max4322/26/29-20 temperature ( c) minimum operating voltage (v) 10 100k 10k frequency (hz) 100 1k 0.040 0 0.005 0.010 0.015 0.020 0.025 0.030 0.035 total harmonic distortion plus noise vs. frequency max4322/26/29-21 thd + n (%) a v = +1 2v p-p signal 500khz lowpass filter r l = 10k ? to v cc /2 0.1 0.001 4.0 4.4 4.2 5.0 4.8 4.6 total harmonic distortion plus noise vs. peak-to-peak signal amplitude max4322/26/29-22 peak-to-peak signal amplitude (v) thd + n (%) 0.01 a v = +1 10khz sine wave r l to v cc /2 500khz lowpass filter r l = 10k ? r l = 100k ? r l = 2k ? r l = 250 ? in 200ns/div voltage (50mv/div) out a v = +1 small-signal transient response (noninverting) max4322/26/29-23 in 200ns/div voltage (50mv/div) out a v = -1 small-signal transient response (inverting) max4322/26/29-24 125 75 -40 -25 -10 5 20 35 50 65 80 95 large-signal gain vs. temperature 85 115 max4322/26/29-19 temperature ( c) gain (db) 105 95 80 90 120 110 100 v out(p-p) = v cc - 600mv r l = 100k ? v cc = 6.5v, r l to v ee v cc = 2.7v, r l to v cc v cc = 2.7v, r l to v ee v cc = 6.5v, r l to v cc in 2 s/div voltage (2v/div) out a v = +1 large-signal transient response (noninverting) max4322/26/29-25 in 2 s/div voltage (2v/div) out a v = -1 large-signal transient response (inverting) max4322/26/29-26
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 8 _______________________________________________________________________________________ pin description pin max4322 max4323 max4327 sot23 so/max sot23 so/max ucsp max4326 max so max4329 name function 1616a2 out output 2424a144 411v ee negative supply. ground for single- supply operation. 3 33b1 in+ noninverting input 4 42b2 in- inverting input 5 7 6 7 a3 8 10 14 4 v cc positive supply 1, 5, 8 1, 5 5, 7, 8 , 10 n.c. no connection. not internally connected. 58b3 shdn shutdown control. connected high or leave floating to enable amplifier. 1, 7 1, 9 1, 13 1, 7 out1, out2 outputs for amps 1 and 2 2 2, 6 2, 8 2, 12 2, 6 in1-, in2- inverting inputs for amps 1 and 2 3 3, 5 3, 7 3, 11 3, 5 in1+, in2+ noninverting inputs for amps 1 and 2 5, 6 5, 9 shdn1 , shdn2 shutdown control for amps 1 and 2. connected high or leave floating to enable amplifier. 8, 14 out3, out4 outputs for amps 3 and 4 9, 13 in3-, in4- inverting inputs for amps 3 and 4 10, 12 in3+, in4+ noninverting inputs for amps 3 and 4
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps _______________________________________________________________________________________ 9 r3 r3 = r1 r2 r1 r2 max4322/max4323 max4326/max4327 max4329 figure 1a. reducing offset error due to bias current (noninverting) r3 r3 = r1 r2 r1 r2 max4322/max4323 max4326/max4327 max4329 figure 1b. reducing offset error due to bias current (inverting) 1k ? 1k ? figure 2. input protection circuit __________ applications information rail-to-rail input stage devices in the max4322/max4323/max4326/max4327/ max4329 family of high-speed amplifiers have rail-to- rail input and output stages designed for low-voltage, single-supply operation. the input stage consists of separate npn and pnp differential stages, which com- bine to provide an input common-mode range extend- ing to the supply rails. the pnp stage is active for input voltages close to the negative rail, and the npn stage is active for input voltages near the positive rail. the input offset voltage is typically below 250v. the switchover transition region, which occurs near v cc /2, has been extended to minimize the slight degradation in cmrr caused by the mismatch of the input pairs. their low offset voltage, high bandwidth, and rail-to-rail common-mode range make these op amps excellent choices for precision, low-voltage, data-acquisition systems. since the input stage switches between the npn and pnp pairs, the input bias current changes polarity as the input voltage passes through the transition region. to reduce the offset error caused by input bias cur- rents flowing through external source impedances, match the effective impedance seen by each input (figures 1a, 1b). high-source impedances, together with the input capacitance, can create a parasitic pole that produces an underdamped signal response. reducing the input impedance or placing a small (2pf to 10pf) capacitor across the feedback resistor improves the response. the max4322/max4323/max4326/max4327/max4329s inputs are protected from large differential input voltages by 1k ? series resistors and back-to-back triple diodes across the inputs (figure 2). for differential input volt- ages less than 1.8v, the input resistance is typically 500k ? . for differential input voltages greater than 1.8v, the input resistance is approximately 2k ? , and the input bias current is determined by the following equation:
figure 3. rail-to-rail input/output voltage range figure 4. capacitive-load stability max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 10 ______________________________________________________________________________________ in 400ns/div voltage (50mv/div) out a v = +1 c l = 500pf figure 5. small-signal transient response with capacitive load in 400ns/div voltage (50mv/div) out a v = +1 c l = 1000pf r s = 39 ? figure 6. transient response to capacitive load with isolation resistor in 2 s/div voltage (1v/div) out v cc = 3v a v = +1 10,000 100 100 1k 100k 10k resistive load ( ? ) capacitive load (pf) 1000 unstable region r l to v ee v out = v cc / 2 rail-to-rail output stage the minimum output voltage is within millivolts of ground for single-supply operation where the load is referenced to ground (v ee ). figure 3 shows the input voltage range and output voltage swing of a max4322 connected as a voltage follower. with a 3v supply and the load tied to ground, the output swings from 0 to 2.90v. the maximum output voltage swing depends on the load, but is within 350mv of a 5v supply, even with the maximum load (500 ? to ground). driving a capacitive load can cause instability in most high-speed op amps, especially those with low quies- cent current. the max4322/max4323/max4326/ max4327/max4329 have a high tolerance for capaci- tive loads. they are stable with capacitive loads up to 500pf. figure 4 gives the stable operating region for capacitive loads. figures 5 and 6 show the response with capacitive loads and the results of adding an iso- lation resistor in series with the output (figure 7). the resistor improves the circuit s phase margin by isolat- ing the load capacitor from the op amp s output. power-up and shutdown mode the max4322/max4323/max4326/max4327/max4329 amplifiers typically settle within 1s after power-up. i = v - 1.8v 2k bias diff ?
figures 9 and 10 show the output voltage and supply current on power-up of the test circuit in figure 8. the max4323 and max4327 have a shutdown option. when shutdown ( shdn ) is pulled low, the supply cur- rent drops to 25a per amplifier and the amplifiers are disabled with the outputs in a high-impedance state. pulling shdn high or leaving it floating (1a internal pullup) enables the amplifier. in the dual-amplifier max4327, the shutdown functions operate indepen- dently. figures 11 and 12 show the output voltage and supply current responses of the max4323 to a shut- down pulse. power supplies and layout the max4322/max4323/max4326/max4327/max4329 operate from a single 2.4v to 6.5v power supply, or from dual supplies of 1.2v to 3.25v. for single-supply operation, bypass the power supply with a 0.1f ceramic capacitor in parallel with at least 1f. for dual supplies, bypass each supply to ground. good layout improves performance by decreasing the amount of stray capacitance at the op amp s inputs and outputs. to decrease stray capacitance, minimize trace lengths and resistor leads by placing external compo- nents close to the op amp. ucsp information layout issues design the layout for the device to be as compact as possible to minimize parasitics. the ucsp uses a bump pitch of 0.5mm (19.7mil) and a bump diameter of 0.33mm (~12mil). therefore, lay out the solder-pad spacing on 0.5mm (19.7mil) centers, using a pad size of 0.25mm (~10mil) and a solder mask opening of 0.33mm (13mil). round or square pads are permissi- ble. connect multiple vias from the ground plane as close to the ground connections as possible. install capacitors as close as possible to the device supply voltage input. place the ground end of these capacitors near the ground plane to provide a low- impedance return path for the signal current. prototype chip installation alignment keys on the pc board, around the area where the chip is located, are helpful in the prototype assembly process. it is better to align the chip on the board before any other components are placed, and then place the board on a hot plate or hot surface until the solder starts melting. remove the board from the hot plate without disturbing the position of the chip and let it cool down to room temperature before processing the board further. max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps ______________________________________________________________________________________ 11 aaa aaa orientation product id code lot code top view (bumps on bottom) a2 a1 a3 max4323ebt (ucsp) marking information r s c l max4322/max4323 max4326/max4327 max4329 figure 7. capacitive-load-driving circuit v out 0 to 2.7v step for power-up test supply-current monitoring point v cc 10 ? 2k ? 10k ? 2k ? max4322/max4323 max4326/max4327 max4329 figure 8. power-up test circuit
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 12 ______________________________________________________________________________________ figure 11. shutdown output voltage figure 10. power-up supply current v cc 5 s/div voltage (1v/div) out figure 9. power-up output voltage v cc 1v/div 5 s/div i cc 500 a/div shdn 1v/div 2 s/div out 0.5v/div v cc = 2.7v r l = 10k ? shdn 1v/div 2 s/div i cc 500 a/div v cc = 2.7v figure 12. shutdown enable/disable supply current
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps ______________________________________________________________________________________ 13 top view v ee in- in+ 1 5 v cc out max4322 sot23-5 2 3 4 in2- in1+ in2+ v ee 1 2 8 7 v cc out2 in1- out1 max4326 so/ max 3 4 6 5 out in1+ n.c. v ee 1 2 8 7 n.c. v cc in1- n.c. max4322 so/ max 3 4 6 5 14 13 12 11 10 9 8 1 2 3 4 5 6 7 out4 in4- in4+ v ee v cc in1+ in1- out1 max4329 in3+ in3- out3 out2 in2- in2+ so 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v cc out2 in2- in2+ v ee in1+ in1- out1 max4327 n.c. shdn2 n.c. n.c. shdn1 n.c. so out in1+ n.c. v ee 1 2 8 7 shdn v cc in1- n.c. max4323 so/ max 3 4 6 5 1 2 3 4 5 10 9 8 7 6 v cc out2 in2- in2+ v ee in1+ in1- out1 max4327 max shdn2 shdn1 v ee in- in+ 1 6 v cc out max4323 sot23 2 3 4 shdn 5 pin configurations (continued) ordering information (continued) part temp range pin/bump- package top mark max4323 ebt-t* -40 o c to +85 o c 6 ucsp-6 aaw max4323eut-t -40 o c to +85 o c 6 sot23-6 aaec MAX4323EUA -40 o c to +85 o c 8 max max4323esa -40 o c to +85 o c 8 so max4326 eua -40 o c to +85 o c 8 max max4326esa -40 o c to +85 o c 8 so max4327 eub -40 o c to +85 o c 10 max max4327esd -40 o c to +85 o c 14 so max4329 esd -40 o c to +85 o c 14 so ucsp reliability the ucsp represents a unique packaging form factor that may not perform as well as a packaged product through traditional mechanical reliability tests. ucsp reliability is integrally linked to the user's assembly methods, circuit board material, and usage environ- ment. the user should closely review these areas when considering use of a ucsp. performance through operating-life test and moisture resistance remains uncompromised. the wafer-fabrica- tion process primarily determines the performance. mechanical stress performance is a greater considera- tion for ucsps. ucsps are attached through direct sol- der contact to the user's pc board, foregoing the inherent stress relief of a packaged product lead frame. solder-joint contact integrity must be considered. comprehensive reliability tests have been performed and are available upon request. in conclusion, the ucsp performs reliably through environmental stresses. * ucsp reliability is integrally linked to the user? assembly methods, circuit board material, and environment. see the ucsp reliability notice in the ucsp reliability section of this data sheet for more information.
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 14 ______________________________________________________________________________________ chip information max4322 transistor count: 170 max4323 transistor count: 170 max4326 transistor count: 340 max4327 transistor count: 340 max4329 transistor count: 680 process: bipolar substrate connected to v ee typical operating circuit max187 max4322 shdn 3 1 2 4 5 6 8 7 v dd +5v ain vref gnd dout serial interface sclk cs package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 10lumax.eps package outline, 10l umax/usop 1 1 21-0061 i rev. document control no. approval proprietary information title: top view front view 1 0.498 ref 0.0196 ref s 6 side view bottom view 0 0 6 0.037 ref 0.0078 max 0.006 0.043 0.118 0.120 0.199 0.0275 0.118 0.0106 0.120 0.0197 bsc inches 1 10 l1 0.0035 0.007 e c b 0.187 0.0157 0.114 h l e2 dim 0.116 0.114 0.116 0.002 d2 e1 a1 d1 min - a 0.940 ref 0.500 bsc 0.090 0.177 4.75 2.89 0.40 0.200 0.270 5.05 0.70 3.00 millimeters 0.05 2.89 2.95 2.95 - min 3.00 3.05 0.15 3.05 max 1.10 10 0.60.1 0.60.1 ? 0.500.1 h 4x s e d2 d1 b a2 a e2 e1 l l1 c gage plane a2 0.030 0.037 0.75 0.95 a1
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps ______________________________________________________________________________________ 15 package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 6l, ucsp.eps sot5l.eps
max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, ucsp/sot23, low-power, rail-to-rail i/o op amps 16 ______________________________________________________________________________________ 6lsot.eps 8lumaxd.eps package outline, 8l umax/usop 1 1 21-0036 j rev. document control no. approval proprietary information title: max 0.043 0.006 0.014 0.120 0.120 0.198 0.026 0.007 0.037 0.0207 bsc 0.0256 bsc a2 a1 c e b a l front view side view e h 0.60.1 0.60.1 ? 0.500.1 1 top view d 8 a2 0.030 bottom view 1 6 s b l h e d e c 0 0.010 0.116 0.116 0.188 0.016 0.005 8 4x s inches - a1 a min 0.002 0.95 0.75 0.5250 bsc 0.25 0.36 2.95 3.05 2.95 3.05 4.78 0.41 0.65 bsc 5.03 0.66 6 0 0.13 0.18 max min millimeters - 1.10 0.05 0.15 dim package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 17 ? 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) soicn .eps package outline, .150" soic 1 1 21-0041 b rev. document control no. approval proprietary information title: top view front view max 0.010 0.069 0.019 0.157 0.010 inches 0.150 0.007 e c dim 0.014 0.004 b a1 min 0.053 a 0.19 3.80 4.00 0.25 millimeters 0.10 0.35 1.35 min 0.49 0.25 max 1.75 0.050 0.016 l 0.40 1.27 0.394 0.386 d d min dim d inches max 9.80 10.00 millimeters min max 16 ac 0.337 0.344 ab 8.75 8.55 14 0.189 0.197 aa 5.00 4.80 8 n ms012 n side view h 0.244 0.228 5.80 6.20 e 0.050 bsc 1.27 bsc c h e e b a1 a d 0 -8 l 1 variations: max4322/max4323/max4326/max4327/max4329 single/dual/quad, low-cost, sot23, low-power, rail-to-rail i/o op amps

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